2. Memory Map

The memory map of the SoC is shown in Table 2.1

Table 2.1 Memory Map of the Chormite M SoC

Base Address

Top Address

Attributes

Description

0x0000_0100

0x0000_010F

R-X

Debug Loop

0x0000_0200

0x0000_0203

R

Boot config

0x0001_0000

0x0001_0FFF

R-X-C

Boot Rom

0x0001_1300

0x0001_13FF

R-W

Uart-0

0x0002_0000

0x2000_00FF

R-W

GPIOs

0x0200_0000

0x0200_BFFF

R-W

Core Local Interrupt Controller

0x0C00_0000

0x0FFF_FFFF

R-W

Platform Level Interrupt Controller

0x1000_0000

0x1000_7FFF

R-W-X-C

On Chip Memory of 16KB

0x8000_0000

0x8FFF_FFFF

R-W-X-C

DDR of 256MB

  • R : Read Access

  • W : Write Access

  • X : Execute Access

  • C : Cacheable Access